Field of the Invention
The present invention relates to video processing, and in particular relates to a motion estimation acceleration circuit and in-loop filtering acceleration circuit by using data in the overlapped portions of neighboring macroblocks recursively to reduce memory bandwidth.
Description of the Related Art
Video compression standards, such as MPEG2, H.264 or VC-1 standards, have been widely used in the video codec (coding/decoding) systems on the market. However, in a video codec system, calculation of motion estimation and de-blocking filtering may have the largest amount of operations. If a video codec system performs motion estimation and de-blocking filtering by software only, it may cause a serious burden to the processing unit. In addition, when a conventional hardware circuit performs motion estimation and de-blocking filtering, some previously used macroblock data may be read from the external memory repeatedly, so that the memory bandwidth for accessing the external memory is wasted.